1. Field of the Invention
The present invention relates to a method of erasing a flash memory and a substrate voltage supply circuit, and more particularly to a method of erasing a flash memory which can recover over-erased cells regardless of the number of over-erased cells on a bit line by applying voltage to a substrate of cells.
2. Description of the prior art
In a stack gate flash memory device, an erasing method comprises the steps of: pre-programming 11; pre-programming verification 12; erasing 13; erasing verification 14; recovery 15 and recovery verification 16 to prevent over-erasing, as shown FIG. 1.
The pre-programming step 11 is executed so that all cells may have high threshold voltage of the program threshold voltage V.sub.t, and the pre-programming verification step 12 is to verify whether pre-programming is successfully executed.
The erasing step 13 is to erase memory cells, and the erasing verification 14 is to verify whether memory cell is successfully erased.
Recovery step 15 is executed to recover the threshold voltage of over-erased cells to the desired threshold voltage. The recovery verification step 16 is to verify the recovery state 15.
Recovery is executed for each bit line as shown in FIG. 2 after executing erasing in the conventional stack gate flash memory device. Namely, it is to apply 0V to the gate, 5V to the drain and the ground voltage V.sub.SS to the source and the substrate.
However, if considerable over-erased cells (cells of which the threshold voltage is less than 0V) exist on a bit line, the voltage applied to the bit line, that is the voltage applied to the drain, remarkably reduces by the current leaking from the bit line. Reliability of the device is lowered since recovery is not executed or long recovery time is needed due to the reduced voltage.